Dr. Jon Wade
Vice President Liberty Chapter International Council on Systems Enigneering
Associate Director for Academic Research, International Council on Systems Engineering (INCOSE)
Director, Systems and Software Division, School of Systems and Enterprises, Stevens Institute of Technology
Chief Technology Officer, Systems Engineering Research Center
Senior Research Scientist
Distinguished Research Professor, School of Systems and Enterprises, Stevens Institute of Technology
Director of Convergent Systems Engineering
University of California at San Diego
Jon Wade is a Senior Research Scientist within the Systems Engineering Research Center, previously serving as the Chief Technology Officer of the Systems Engineering Research Center (SERC) from June of 2013 through February of 2020. Dr. Wade also has served as the Director of the Systems and Software Engineering Division and the Associate Dean of Research of the School of Systems and Enterprises at Stevens Institute of Technology (Stevens). He also serves as the INCOSE Associate Director for Academic Research and became an INCOSE Fellow in 2018. His research interests include complex systems, future directions in systems engineering research, and the use of technology in systems engineering and STEM education. Dr. Wade received his S.B., S.M., E.E. and Ph.D. degrees in electrical engineering and computer science from the Massachusetts Institute of Technology. His doctoral concentration was in Device Physics and Business Administration.
Professor Wade has an extensive background in leading research and development organizations and managing the development of Enterprise quality products. Previously, Wade was the executive vice president of engineering at International Game Technology (IGT) where he created corporate vision, led product development, championed the development of a corporate architecture and system development practices, and managed corporate wide research and development. Before joining IGT, Wade spent ten years at Sun Microsystems during which time he managed the development of the Ultra- SPARC V based Enterprise Server family and served as the product manager for high-performance interconnects. Prior to this, he led super computer development at Thinking Machines Corporation.
Dr. Wade was elected to the Sigma Xi (Scientific Research), Tau Beta Pi (National Engineering), and Eta Kappa Nu (National Electrical Engineering) Honorary Societies. Wade has served on the Boards of a number of organizations including the Software and Systems Consortium, DigiDeal Corporation, and the Center for Excellence in Education. Dr. Wade holds 11 patents in the areas of integrated circuits, computer architecture, networked systems and internal combustion engines.
- SERC-2017-TR-107-Design and Development Tools for the Systems Engineering Experience Accelerator
- SERC-2015-TR-105-Developing the Systems Engineering Experience Accelerator (SEEA) Prototype and Roadmap
- SERC-2009-TR-003-1-Investigation of a Graphical CONOPS Development Environment for Agile Systems Engineering
- SERC-2010-TR-007-1-Investigation of a Graphical CONOPS Development Environment for Agile Systems Engineering – Phase II
- SERC-2010-TR-009-1-System 2020 - Strategic Initiative
- SERC-2012-TR-009-2-System 2020-Phase-II
- SERC-2010-TR-006-1-Development of 3-Year Roadmap to Transform the Discipline of Systems Engineering
- SERC-2012-TR-034-1-Expedited Systems Engineering for Rapid Capability and Urgent Needs
- SERC-2015-TR-112-Systems Engineering Expert Knowledge (SEEK)
- SERC-2011-TR-016-1-Developing the Systems Engineering Experience Accelerator (SEEA) Prototype and Roadmap- Year 1
- SERC-2012-TR-016-2-Developing the Systems Engineering Experience Accelerator (SEEA) Prototype and Roadmap – Year 2
- SERC-2013-TR-016-3-Developing the Systems Engineering Experience Accelerator (SEEA) Prototype and Roadmap – Year 3
- SERC-2017-TR-111-Developing Systems Engineering Experience Accelerator (SEEA) Prototype and Roadmap
- SERC-2016-TR-116-Certifying SEEA Compliance with Section 508
- SERC-2015-TR-016-4-Developing the Systems Engineering Experience Accelerator (SEEA) Prototype and Roadmap – Year 4
- SERC-2016-TR-110-Design and Development Tools for the Systems Engineering Experience Accelerator – Part 2
- SERC-2018-TR-106-Mission Engineering Competencies
- SERC-2009-TR-001-1-Early Identification of SE-Related Program Risks
- SERC-2019-TR-004-RT 194: Design and Development Tools for the Systems Engineering Experience Accelerator – Part 4
- SERC-2018-TR-120-Framework for Analyzing Versioning and Technical Debt
- SERC-2015-TR-106-New Project Incubator
- SERC-2018-TR-105-New Project Incubator
- SERC-2020-TR-010-WRT-1006 Technical Report: Developing the Digital Engineering Competency Framework (DECF), Version 1.0
- SERC-2021-TR-005-WRT-1006 Technical Report: Developing the Digital Engineering Competency Framework (DECF) – Phase 2
- SERC-2021-TR-008-WRT-1018: DAU Credential Development
Lead Author
- Conference Paper - SE Simulation Experience Design: Infrastructure, Process, and Application
- Conference Paper - Multi-Criteria Simulation of Program Outcomes
- Conference Paper - Designing an Experiental Learning Evironment for Logistics and Systems Engineering
- Conference Paper - The Architecture of the Systems Engineering Experience Accelerator
- Conference Paper - Year One of the Systems Engineering Experience Accelerator
- Conference Paper - Simulation-Based Decision Support for Systems Engineering Experience Accelerator
- Conference Paper - Investigating an Innovative Approach for Developing Systems Engineering Curriculum: The Systems Engineering Experience Accelerator
- Conference Paper - Building a Competency Taxonomy to Guide Experience Acceleration of Lead Systems Engineers
- Conference Paper - An Integrated, Modular Research Architecture for the Transformation of Systems Engineering
- Poster - RT 16 – System Engineering Experience Accelerator
- Poster - Framework for Analyzing Versioning and Technical Debt
- Presentation - Systems Engineering Meetings the Challenges of the 21st Century
- Presentation - Set Program Overview
- Presentation - SERC Research Council (RC) Panel : The Future of Systems Engineering (SE) Research
- Presentation - SERC Research Council Panel: The Future of Systems Engineering Research
- Presentation - Systems Engineering Expert Knowledge : SEEK
- Presentation - Experience Accelerator
- Presentation - SERC Research Council (RC) Panel : The Future of Systems Engineering (SE) Research
- Presentation - SERC 2014-2018 Strategic Technical Plan
- Presentation - RT 16 Experience Accelerator Progress and Future Plans
- Presentation - RT16 Experience Accelerator: Year 1 Summary
- Video - DAU Webcast "Digital Readiness: Age of Digital Engineering"
- Workshop Report - Relationship Between Systems Engineering and Software Engineering
- Other - Research Transition Report 2017 “Transitioning research into practice – crossing boundaries through integrative collaboration”
Co-Author
- Poster - Mission Engineering Competencies
- Presentation - Framework for Analyzing Versioning and Technical Debt
- Design and Development Tools for the Systems Engineering Experience Accelerator
- System Engineering Experience Accelerator (SEEA)
- Graphical Concept Of Operations
- System 2020
- A 3-Year Roadmap to Transform the Discipline of SE
- Expedited System Engineering
- Systems Engineering Expert Knowledge (SEEK)
- Mission Engineering Competencies
- Assessing SE Effectiveness In Major Defense Acquisition Programs
- Framework for Analyzing Versioning and Technical Debt
- New Project Incubator 2014-2015
- New Project Incubator 2017-2018
- Digital Engineering Competency Framework
- DAU Credential Development